1. Field of the Invention
The present invention relates to an input/output device and, more specifically, to an input/output device for use in combination with an electronic computer or a communications apparatus for the simultaneous bidirectional exchange of differential signals between a plurality of input/output devices.
2. Description of the Prior Art
A simultaneous bidirectional transmission apparatus for transmitting and receiving differential signals disclosed in Japanese Patent Laid-open (Kokai) No. 7-11702 is intended principally for reducing the number of necessary transmission lines to half the number of necessary transmission lines of a conventional unilateral input/output device having the same transmission rate, and for preventing the action of the output of a transmitting circuit on the input of a receiving circuit due to a sneak current only by the division of signal potential by a small-scale resistance circuit to receive a signal sent out through the other input/output device.
This known simultaneous bidirectional transmission apparatus is provided with input/output devices each having matching termination resistors at the opposite ends, respectively, of each of a first and a second transmission line for transmitting differential signals. Each input/output device has a transmitting circuit provided with a first and a second output terminal. The first and the second output terminal are connected through the matching termination resistors to the first and the second transmission lines, respectively, to apply transmitted differential signals to the first and the second transmission lines. Each input/output device is provided with a differential receiving circuit having an inverting input terminal and a noninverting input terminal to receive signals transmitted through the transmission lines by the other input/output device. A potential dividing resistor is connected across the first output terminal of the transmission line and the second transmission line to apply the divided potential to the noninverting input terminal of the receiving circuit. The resistances of the potential dividing resistors must be far greater than those of the matching termination resistors. The potential dividing resistors and the matching termination resistors of this known input/output device prevent the reception of of the output of the transmitting circuit as a differential signal between the inverting input terminal and the noninverting input terminal of its own receiving circuit, and at least part of a signal transmitted thereto through the transmission line by the other input/output device at the inverting input terminal and the noninverting input terminal of the receiving circuit.
The inventors of the present invention found that this prior art input/output device has the following three drawbacks in carrying out high-rate simultaneous bidirectional transmission.
First, in this input/output device, the median potential between the first and the second output, which are differential complementary outputs, of its own transmitting circuit, i.e., the median potential between the HIGH output and the LOW output, directly to the inverting input terminal and the noninverting input terminal of the receiving circuit in addition to the input signal from the other input/output device. Consequently, when the output of the transmitting circuit is inverted, the signal applied to its inverting input terminal and the noninverting input terminal of its receiving circuit is affected unless the first and the second output are inverted simultaneously when the output of the transmitting circuit is inverted. This drawback may be ignored when transmission rate is very low. However, recent advanced differential transmitting circuits, such as CMOS units or TTL units, which are widely used in the transmitting circuit of a high-speed transmission apparatus, form the first output unit and the second output unit of the transmitting circuit independently. Therefore, the first and the second output differ from each other in output inversion start time and time necessary for output inversion. If this prior art input/output device having such a drawback is applied to high-speed transmission, pulse noise appears on the inverting input terminal and the noninverting input terminal of the receiving circuit when the first and the second output of the transmitting circuit are inverted. Although the pulse noise, in principle, is common mode noise, practically, part of the pulse noise changes into normal noise to reduce the noise margin of the input/output device because the receiving circuit is unable to remove the noise thoroughly. If pulse noise appears when inverting the received signal, jitter in the receiving circuit becomes greater.
Secondly, in this prior art input/output device, the resistance of the potential dividing resistor connected to the input terminal of the receiving circuit must be very large as compared with the resistances of the matching termination resistors and, consequently, the current applied to the inverting input terminal and the noninverting input terminal of the receiving circuit is unavoidably very small. Therefore, if the input unit of the receiving circuit has a large parasitic capacitance, the waveform of the received signal becomes dull when inverted to make high-speed signal transmission difficult. Generally, the inverting input terminal and the noninverting input terminal of the input unit of a commercial standard receiving circuit, such as RS-422, are connected through resistors to a ground potential and a supply potential, respectively, to protect the receiving circuit. Therefore, the dc potential of the protective circuit is superposed on the received signal to cause amplitude reduction or jitter enhancement when the input/output device is provided with such a receiving circuit.
Thirdly, although the output resistance of the transmitting circuit is ignored in the prior art input/output device, practically, the transmitting circuit has an output resistance. Therefore, the amplitude of the differential output of the transmitting circuit varies according to the combination of sending signals given to the input/output devices connected to the opposite ends of the transmission line, respectively. When the combination of sending signal given to the input/output devices is a combination of HIGH and HIGH or a combination of LOW and LOW, there is no potential difference between the opposite ends of the transmission line and hence no current flows through the transmission line, and the differential output has a maximum amplitude because a voltage drop due to the output resistance of the transmitting circuit is a minimum. When the combination of the sending signals is a combination of HIGH and LOW or a combination of LOW and HIGH, a current flows through the transmission line due to the potential difference between the opposite ends of the transmission line, and the amplitude of the differential output become a minimum because the voltage drop due to the output resistance of the transmitting circuit is a maximum. Although the operating speed of transmitting circuits comprising CMOS circuits or TTL circuits has been progressively increased in recent years, it is difficult to employ a transmitting circuit comprising CMOS circuits or TTL circuits for high-speed transmission because the output resistance of such a transmitting circuit is large as compared with that of ECL circuits.